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<h4 class="subsection" id="Other-MIPS-Built_002din-Functions-1"><span>6.60.19 Other MIPS Built-in Functions<a class="copiable-link" href="#Other-MIPS-Built_002din-Functions-1"> &para;</a></span></h4>

<p>GCC provides other MIPS-specific built-in functions:
</p>
<dl class="table">
<dt><code class="code">void __builtin_mips_cache (int <var class="var">op</var>, const volatile void *<var class="var">addr</var>)</code></dt>
<dd><p>Insert a &lsquo;<samp class="samp">cache</samp>&rsquo; instruction with operands <var class="var">op</var> and <var class="var">addr</var>.
GCC defines the preprocessor macro <code class="code">___GCC_HAVE_BUILTIN_MIPS_CACHE</code>
when this function is available.
</p>
</dd>
<dt><code class="code">unsigned int __builtin_mips_get_fcsr (void)</code></dt>
<dt><code class="code">void __builtin_mips_set_fcsr (unsigned int <var class="var">value</var>)</code></dt>
<dd><p>Get and set the contents of the floating-point control and status register
(FPU control register 31).  These functions are only available in hard-float
code but can be called in both MIPS16 and non-MIPS16 contexts.
</p>
<p><code class="code">__builtin_mips_set_fcsr</code> can be used to change any bit of the
register except the condition codes, which GCC assumes are preserved.
</p></dd>
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